Powerlattice Technologies Inc has sold $86,009,965 of a $111,010,000 equity offering, according to a Form D notice of exempt offering the Vancouver, Washington-based startup filed with the U.S. Securities and Exchange Commission on October 30, 2026. The company, which is developing a power delivery chiplet for AI processors, reported a date of first sale of October 15, 2026.
Offering Terms and Investors
The notice reports a total offering amount of $111,010,000, with $86,009,965 already sold and $25,000,035 remaining to be sold. The securities are equity, and the issuer claimed the exemption under Rule 506(b), the Regulation D safe harbor commonly used for private placements without SEC registration. Eighteen investors had already invested, all of them accredited; the filing lists no non-accredited investors, no minimum investment amount, and no sales commissions or finders’ fees.
The submission is a new filing rather than an amendment to an earlier notice. It was signed by Peng Zou, the company’s co-founder and chief executive, on October 30, 2026, and SEC filing records show the agency accepted it at 9:56 a.m. Eastern Time that day. The filing also indicates the offering is not intended to run for more than one year.
The issuer is a Delaware corporation incorporated in 2023, with its address listed as 203 SE Park Plaza Drive, Suite 210, in Vancouver, Washington, and its industry group given as Other Technology. The company declined to disclose a revenue range. The filing names Zou, Sujith Dermal and Gang Ren as executive officers and directors, and Steve Fu, Pat Gelsinger and Wen Hsieh as directors.
Earlier Funding and Founding Team
Powerlattice emerged from stealth on November 17, 2025, announcing a $25 million Series A round jointly led by Playground Global and Celesta Capital, and said at the time that it had raised $31 million in funding to date. Months earlier, the company had filed two previous notices of exempt offering, dated May 23, 2025 and May 27, 2025, according to its EDGAR filing history, which also records the company’s earlier name styling as PowerLattice Technologies Inc.
Powerlattice was founded by Zou, Gang Ren and Sujith Dermal and describes itself as a fabless semiconductor company, with a founding team whose experience spans Qualcomm, NUVIA and Intel as well as integrated magnetics, analog IC, power management and system design. With the Series A, Pat Gelsinger, a general partner at Playground Global, and Dr. Steve Fu, a partner at Celesta Capital, joined the board. The company is headquartered in Vancouver, Washington; its stealth announcement listed an additional office in Chandler, Arizona, and its October 2026 release also listed San Jose, California.
Chiplet Technology and October Demonstration
The company’s product is what it calls the industry’s first power delivery chiplet: an integrated voltage regulator, or IVR, built directly into the processor package to deliver point-of-load power vertically to the processor. Powerlattice describes a Rainier micro-IVR architecture that combines its PowerMagix miniaturized on-die magnetic inductors, control circuit innovations it calls Programmable Power Array synchronization, and a programmable software layer, and it claims an order-of-magnitude reduction in power noise compared with conventional motherboard power delivery.
The company says AI accelerators and GPUs are pushing past 2,000 watts per chip, and claims its approach reduces total compute power needs by more than 50% — a reduction it says can translate into 2X or more raw performance uplift under a fixed data center power budget.
On October 26, 2026, Powerlattice announced the successful demonstration of what it described as the industry’s first monolithic IVR chiplet, which integrates the controller, power transistors and inductors into a single chiplet. In the demonstration, the chiplet supplied power to a high-precision silicon device that Powerlattice developed to emulate the wide-ranging loads and rapid changes in current demand of next-generation AI accelerators.
“By integrating point-of-load power delivery directly into the processor package, we give designers the flexibility to tailor power delivery to their processors, whether using an individual IVR chiplet or a synchronized array,” Zou said in the demonstration announcement.
As of its November 2025 stealth announcement, the company said it had silicon in hand and engineering samples in progress for GPUs, CPUs and accelerators drawing more than 1,000 watts.